![]() ![]() ![]() Improved 3 integer ALU, 2 vector ALU and 2 AGU per core.Shared 元 cache which includes the processor graphics ( LGA 1155).32 KB data + 32 KB instruction L1 cache and 256 KB L2 cache per core.Intel demonstrated a Sandy Bridge processor with A1 stepping at 2 GHz during the Intel Developer Forum in September 2009.
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